REALAIZATION OF FULL ADDER USING REDUNDANT NUMBER REPRESENTATION IN OPTICAL COMPUTING

Abstract

Even with the introduction of parallel computer architecture, the processing speed is restricted by bus constraints and channel bandwidth. One of the solutions to enhance the speed of today's electronic computers is to use optical computing which involves the manipulation of photons rather than electrons

Optical computing based on redundant number representation is expected to be capable of performing high-speed arithmetic operation by exploiting the good features of light such as inherent parallelism, non-interfacing communication, multi-dimensional storage, and ultra-high speed processing.

The purpose of this project is to perform a carry-free parallel arithmetic addition algorithm. Using Modified Signed-digit (MSD) numbers; the carry propagation can be confined in two adjacent digit positions and thus arithmetic operation of arbitrary-length operands can be completed in definite steps and constant time.

The conventional two-operand optical shadow-casting (OSC) technique was used successfully to implement a binary MSD (BMSD) adder. Three-step adder configuration is proposed in this work. The proposed scheme is based on suitable programming of the decoding mask of the OSC system, which is obtained from the derived design equations.

High-level program is used to simulate the optical implementation (i. e. C-language).