Implementation of Digital FM Receiver using FPGA

Abstract

The complexity of hardware in traditional FM radio lead to bigger radio size, noisy, difficulties in maintenance and higher production costs. In addition to limitation on protocols and frequency bands supported, which lead to use different radio devices for different networks and communication protocols. Software Defined Radio technology provides an efficient and comparatively inexpensive solution to these problems replacing a lot of cascaded electronics components by a single digital chip FPGA (Field Programmable Gate Array) resulting in low production cost, immunity to noise, ease of maintenance and enormous reduction of radio size. In this thesis, digital FM receiver was designed in SIMULINK and implemented successfully on Xilinx Zynq-7000 FPGA on ZedBoard evaluation kit with JTAG co-simulation. The design was tested with both single tone message and multi tone message real voice. Receiver was tunable in real time to select receiving FM channel with GUI designed for this project. Results achieved were very acceptable and transmitted message was successfully recovered on the receiver which was clear from time domain graphs from time scope and frequency domain graphs from spectrum analyzer.