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Direct Mapping Cache Memory Design

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dc.contributor.author Mustafa, Hajir Mohammed Awad
dc.contributor.author Supervisor - Abd Alrasol Jabar Alzubaidy
dc.date.accessioned 2014-08-28T10:03:27Z
dc.date.available 2014-08-28T10:03:27Z
dc.date.issued 2009-02-01
dc.identifier.citation Mustafa,Hajir Mohammed Awad.Direct Mapping Cache Memory Design/Hajir Mohammed Awad Mustafa;Abd Alrasol Jabar Alzubaidy.-Khartoum:SUDAN UNIVERSITY OF SCIENCE AND TECHNOLOGY,College of Engineering,2009.-119p. : ill. ; 28Cm.-M.Sc. en_US
dc.identifier.uri http://repository.sustech.edu/handle/123456789/6975
dc.description Thesis en_US
dc.description.abstract Today’s high performance microprocessors operate at speeds that far outpace even the faster of the memory bus architectures that are commonly available. One of the biggest limitations of main memory is the wait state: period of time between operations. The most common technique used to match the speed of the memory system to that of the processor is caching. Cache memory is the level of computer memory hierarchy situated between the processor and main memory. It is a very fast memory the processor can access much more quickly than main memory or RAM. Cache is relatively small and expensive. It is function is to keep a copy of the data and code (instruction) currently used by the CPU. By using cache memory waiting stases are significantly reduced and the work of the processor becomes more effective. The main idea of this search is to apply hard ware using cache memory to discuss how its increases the CPU performance. In hardware designs several components and devices are assembled to design and implement a digital circuit .This circuit is connected to a computer through a cable to transfer the data to and from computer via D-25 connector. This hardware aided with personal computer (PC) to provide the necessary software by using C++ language which has ability to be in direct interface with computer for signaling the hardware and get result of the circuit. There is a need to interface between the circuit hardware and the CPU to manage the circuit operations, this interface is implemented through line Printer. Lastly some illustrative examples are given. en_US
dc.description.sponsorship SUDAN UNVERSITY OF SCIENCE AND TECHNOLOGY en_US
dc.language.iso en en_US
dc.publisher SUDAN UNVERSITY OF SCIENCE AND TECHNOLOGY en_US
dc.subject Electronics Engineering en_US
dc.subject Cache Memory - Design en_US
dc.title Direct Mapping Cache Memory Design en_US
dc.title.alternative تصميم ذاكرة مخبأة باستخدام طريقة التخطيط المباشر en_US
dc.type Thesis en_US


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