System-on-Chip (SoC) Design using Programmable Logic Devices (PLD's)

Abstract

In this research system on chip (SoC) design using programmable logic devices (PLDs) has been introduced. The main objective of this research is to reduce the size of printed circuit boards (PCBs) and the power consumption in digital systems. Beside that, to gain more flexibility in the digital systems design by designing digital systems with programmable data width and memory and I/O maps. Digital systems moduals were designed for the previous purposes by using complex programmable logic devices (CPLDs). An AHDL programs were written for these moduals using MAX+plusII software. Finally, using down-load software (DNL82) the programs were loaded to the CPLD IC through the serial port of the PC. The designs were tested and good results were obtained.